Count-down circuit using a tunnel diode

ABSTRACT

A count-down circuit using a tunnel diode for counting down a repetition frequency of an input pulse signal applied from an input terminal to one electrode of the tunnel diode so as to produce a counted-down output from an output terminal connected to said one electrode of the tunnel diode, in which a seriesconnection comprising a resistor and a collector-emitter path of a transistor is connected to the output terminal. A bias current is applied through at least a part of the series-connection and the tunnel diode so that an operating point of the tunnel diode is maintained in a low-voltage region. A pulse generator is connected to a path between the input terminal and the tunnel diode for generating a pulse having a repetition period equal to an integer multiple of a repetition period of the input pulse signal in synchronism with the input pulse signal. A bistable circuit is connected to the base of the transistor so as to be set in response to each output pulse of the pulse generator and reset until a just succeeding one of output pulses of the pulse generator.

United States Patent Suzuki [451 Oct. 24, 1972 COUNT-DOWN CIRCUIT USING A TUNNEL DIODE Inventor: Koji Suzuki, Tokyo, Japan Assignee: lwamald Tsushinlti Kabushiltl Kalsha (also known as lwatsu Electric Co., Ltd.), Tokyo-to, Japan Filed: May 14, 1971 Appl. No.: 143,367

Foreign Application Priority Data May l8, 1970 Japan ..45/423l2 References Cited UNITED STATES PATENTS Alexander ..307/286 X De Bottari et al ..307/223 B Zimmerman...........307/225 B Kaufman ...................307/286 Weischedel ..307/222 B Primary Examiner-John S. Heyman Attorney-Robert E. Burns and Emmanuel J. Lobato [57] ABSTRACT A count-down circuit using a tunnel diode for counting down a repetition frequency of an input pulse signal applied from an input terminal to one electrode of the tunnel diode so as to produce a counted-down output from an output terminal connected to said one electrode of the tunnel diode, in which a series-connection comprising a resistor and a collector-emitter path of a transistor is connected to the output terminal. A bias current is applied through at least a part of the series-connection and the tunnel diode so that an operating point of the tunnel diode is maintained in a low-voltage region. A pulse generator is connected to a path between the input terminal and the tunnel diode for generating a pulse having a repetition period equal to an integer multiple of a repetition period of the input pulse signal in synchronism with the input pulse signal. A bistable circuit is connected to the base of the transistor so as to be set in response to each output pulse of the pulse generator and reset until a just succeeding one of output pulses of the pulse generator.

3 Claims, 15 Drawing Figures BISTABLE CIRCUIT RESET PULSE PATENTEB um 24 I972 sum 1 or a PRIOR AR PATENTEDom 24 I972 SHEET 6 0F 8 ClRCUlT OUTPUT RESET CLOCK BISTABLE A J PULSE GENE- RATOR RESET L Fig.8B

I COUNT-DOWN CIRCUIT USING A TUNNEL DIODE This invention relates to count-down circuits using a tunnel diode used in a sampling oscilloscope by way of example.

For example, a count-down circuit using a tunnel diode is employed in a sampling oscilloscope to countdown a frequency of an input signal. However, conventional count-down circuits are difficult to adjust to an optimum condition and are affected by change of conditions in the room temperature etc.

An object of this invention is to provide a countdown circuit capable of eliminating the above-mentioned defects of conventional circuits and operable in a stable condition without trouble adjustments against the change of conditions and the characteristic deviations in constructive elements.

Other objects and principles, constructions and operations of this invention will be understood from the following detailed discussion taken in conjunction with the accompanying drawings, in which the same or equivalent parts are designated by the same reference numerals, characters and symbols, and in which:

FIG. I is a connection diagram illustrating a conventional count-down circuit employed in a synchronous circuit of a sampling oscilloscope;

FIG. 2 is a waveform diagram explanatory of the operations of the circuit shown in FIG. 1;

FIGS. 3A and 3B are graphs of characteristic curves explanatory of bias conditions of a tunnel diode used in a circuit shown in FIG. 1;

FIG. 4A is a connection diagram illustrating a main part of a circuit shown in FIG. 1;

FIG. 4B is a waveform diagram explanatory of the operations of a circuit shown in FIG. 4A;

FIG. 5 is a circuit diagram illustrating an embodiment of this invention;

FIG. 6 is a waveform diagram explanatory of the operations of a circuit shown in FIG. 5;

FIG. 7 is a graph of a characteristic curve explanatry of bias conditions of a tunnel diode used in a circuit shown in FIG. and

FIGS. 8A, 8B, 8C, SD, SE and SF are circuit diagrams each illustrating an embodiment of this invention.

To clarify differences between conventional techniques and this invention, an example of conventional count-down circuits is at first described with reference to FIGS. I, 2, 3A, 3B, 4A and 4B. In a synchronizing circuit of FIG. 1 employing a countdown circuit and used in a conventional sampling oscilloscope, a frequency of a signal applied to an input terminal I is counted-down to a frequency less than a frequency of IO mega-Hz and equal to one integralthereof. The counted-down signal is amplified in a transistor 0 so as to obtain an amplified signal v, shown in FIG. 2. An oscillator comprising a transistor 0 and diodes D and D; has a self-oscillating frequency of I00 KI-Iz and generates negative pulses v, as shown in FIG. 2 in synchronism with the rise time of the output of the transistor Q A tunnel diode D, is biased so as to have two possible states. On the other hand, a tunnel diode D is biased so as to have a mono-stable state and assumes a low-voltage state at a normal condition. In this case, the tunnel diode D assumes an operating point 1 on a voltage-current characteristic thereof shown in FIG. 3A in response to the cut-off of a transistor 04, while the tunnel diode D, assumes an operating point 1 on a voltage-current characteristic curve thereof shown in FIG. 38. If an output of the transistor Q, is applied to the tunnel diode B; through a resistor R; and a capacitor 0,, the operational point of the tunnel diode D, is transferred, over a negative-resistance region, to an operating point (2) as shown in FIG. 3A. In FIG. 2, a cathode voltage v,: of the tunnel diode D, is shown. In response to this transfer of the operational point of the tunnel diode 0,, the diode D, is turned-ON from the cut-off state, while an operating point of the tunnel diode D is transferred to an operating point 2 from the operating point 1 shown in FIG. 3B. When a negative output pulse of the transistor 0, is applied to the tunnel diode D. through a capacitor C the operating point of the tunnel diode D is transferred to a stable operating point 3 shown in FIG. 38 over the negative-resistance region. Accordingly, a negative output v. shown in FIG. 2 appears at the cathode of the tunnel diode D,. A part of the output v,, of the tunnel diode D passes through a resistor R and a capacitor C, so as to be converted to a negative pulse v shown in FIG. 2, so that an operating point of a tunnel diode D is transferred from a low-voltage region to a high-voltage region. In this case, the tunnel diode D becomes conductive while the operating point of the tunnel diode D, returns to the low-voltage region as shown by a point 1 in FIG. 3A. In response to this change, a diode D is cut-oft while the operating point of the tunnel diode D, returns to a point 1 shown in FIG. 3A. As mentioned above, a signal obtained by counting down the output of the transistor Q below a frequency of KHZ can be obtained from a cathode of the tunnel diode D in accordance with the monostable operation of a tunnel diode D The output of the tunnel diode D, is further applied to a cathode of a tunnel diode D through a resistor R and a capacitor C,,. This tunnel diode D is employed as a bistable circuit. When the operating point of the tunnel diode D is transferred to a high-voltage region in response to the output of the tunnel diode D.,, a transistor Q assumes conductive from a cut-off state while a diode D, is cut-off from a conductive state. Accordingly, a high-speed saw-tooth wave can be obtained from a base of a transistor 0 This transistor 0,; compares the high-speed saw-tooth wave with a low-speed saw-tooth wave applied to a terminal 2 for generating from an output terminal 3 an output pulse, a part of which is returned through a diode D and a resistor R to the tunnel diode D, to restore it to the low-voltage region. If this circuit is employed in a sampling oscilloscope, the output pulse of the terminal 3 is employed as a sampling command pulse for generating a sampling pulse.

The above-mentioned circuit is so designed that jitters are reduced in counting down a signal of about 10 Mega-Hz, obtained by counting down at the diode D below a signal of 100 Kilo-Hz. However, the abovementioned circuit is difficult to adjust to an optimum condition and is readily affected by change of conditions in the room temperature etc. Reasons therefore are as follows.

A part of the circuit, shown in FIG. 1, for counting down the output of the diode D below a low frequency signal of I00 Kilo-Hz can be briefly illustrated as shown in FIG. 4A. In this case, the output v of the transistor O is applied to a terminal 11, anda negative output pulse v; of a collector of the transistor having a repetition frequency less than a frequency of 100 Kilo- Hz and synchronized with a rise time of the transistor 0, is applied to a terminal 12. The operating point of the tunnel diode D is transferred from the low-voltage region to the high-voltage region in response to a rise time of the output v, of the transistor Q, applied to the terminal 11, only when the operating point of the tunnel diode D, is transferred to the high-voltage region in response to the pulse v; applied to the terminal 12. The output v, from the tunnel diode D is obtained from a terminal 13. In this case, if the bias voltage for the bistable states of the tunnel diode D. is reduced so as to increase the level of the pulse v, of the terminal 12, an overflow current may be passed through a diode D and the tunnel diode B, after converting the operating point of the tunnel diode D, from the low-voltage region to the high-voltage region. This overflow current has a dangerous chance for transferring the operating point of the tunnel diode D, from the low-voltage region to the high-voltage region. Accordingly, the bias voltage of the tunnel diode must be sufficiently large to avoid the above mentioned overflow current while the level of the pulse v; applied to the terminal 12 must be small. In other words, a considerable current is passed to the tunnel diode D through the diode D even if the operating point of the tunnel diode D assumes the lowvoltage region. Accordingly, it is very difficult to determine the value of the capacitor C so that the level i of a pulse applied from the terminal 11 to the tunnel diode D through a capacitor C, satisfy the following relationship:

|1,,1,| i |1,,1,| (1) Moreover, since the level of the pulse v, applied to the terminal 11 is not constant, it is very difficult to determine the value of the capacitor C, so as to always satisfy the condition shown by the equation (1). Moreover. since the bias voltage for the bistable states of the tunnel diode D depends upon respective characteristics of the diodes D and D,, we well as values of the tunnel diode D,,, a resistor R,, and a source voltage V the value of the resistor R must be precisely determined after completion of a combination of the diodes D D and D The operations of the tunnel diode D closely depends upon the bias voltage of the diode D, as mentioned above. Accordingly, skilled techniques and a sufficient time are necessary for adjustment of the capacitor C and the register R, since this adjustment must be simultaneously performed for the capacitor C and the register R Moreover, since respective voltage-current characteristics of the diodes D D, and D are affected in response to change of conditions, such as the room temperature, this circuit cannot continue a correct operation under fluctuations of conditions even if respective values of the capacitor C and the resistor R, are adjusted to optimum values. Furthermore, since the output V, of the tunnel diode D, assumes a small level, the operating point of the tunnel diode D, employed as a bistable multivibrator is necessarily determined so as to be close to the current I, on the low-voltage region, while a resistor R must be adjusted so as to avoid transfer of the diode D to the high-voltage region in response to noise in a path from the cathode of the tunnel diode D. to the cathode of the tunnel diode D With reference to FIGS. 5, 6 and 7, an embodiment of this invention for eliminating the above-mentioned defects of the conventional count-down circuit is now described. In this embodiment, diodes D, and D, and transistors Q, and Q, perform the same operations as those of elements D D Q, and Q, shown in FIG. I. A mono stable multivibrator A is connected to a path between the tunnel diode D and the input terminal tv, has a repetion period of about 10 micro-seconds and synchronized with an input signal of a frequency more than 20 Mega-Hz by way of example or may be an oscillator of about Kilo-Hz. A bistable circuit B is set to a high output state of an output terminal T in response to a positive clock pulse v, when a reset terminal T assumes a high level, while reset to a low output state in response to a negative reset pulse applied to the reset terminal T As understood from a waveform v, and v,, shown in FIG. 6, the monostable multivibrator A generates a positive pulse v, in response to a forward edge or a rear edge of an output v of the transistor 0 When the output pulse v, is applied to the clock terminal of the bistable circuit B, a positive pulse v, is obtained at the output terminal "I as shown in FIG. 6 so that a transistor Q10 becomes conductive from a cut-off state. No current is passed through a tunnel diode D when the transistor O is cut-off, so that this tunnel diode D is not transferred over a negative negative-resistance region to a high-voltage region even if the output of the transistor 0-, is applied thereto through a resistor R, and a capacitor C However, if the transistor Q becomes conductive, a current flows through a path: a source or input terminal +V,, the tunnel diode D,, a resistor R the transistor Q and the ground. Accordingly, the tunnel diode D is biased so as to have one of two possible states on a voltage-current characteristic shown in FIG. 7, and an operating point of the tunnel diode D is restored to a point 1 in a low-voltage region. In this case, if the negative output pulse v, of the transistor 0 is applied to the tunnel diode D,,, the operating point of the tunnel diode D is transferred over the negative-resistance region to a point (2) shown in FIG. 7. In response to this change of the tunnel diode D the transistor Q, becomes conductive so that an output pulse v is obtained a collector of the transistor 0;. Thereafter, a sampling command pulse v shown in FIG. 6 is obtained in a manner similar to the operations described with reference to FIG. 1. A part of the sampling command pulse v,,, is applied to the reset terminal T, of the bistable circuit B to reset it to the low output state.

An example of elemental construction of this invention is described with reference to FIG. 8A. In this example, a circuit A is an oscillator of a repetition period I or a monostable circuit, which generates a positive pulse v, as shown in FIG. 6 in synchronism with the rise time of an input signal of a repetion period t. The repetition period P of the output pulse of the circuit A is therefore equal to a value a: and substantially equal to the repetition period P where n is an integer. In other words, the frequency of the input signal is counted down to one n-th. In this case, since the output pulse of the circuit A has jitters and delay times with respect to the input signal, this output pulse cannot be employed as they are for a synchronizing circuit used in a sampling oscilloscope etc. A circuit B is a bistable circuit, which is set to a high output state in response to the output pulse of the circuit A and reset to a low output state in response to a reset pulse obtained from the output thereof. A tunnel diode D is maintained to a low-voltage region, even if an input signal is applied to this diode D in a case where a collector-emitter path of a transistor Q Connected to the tunnel diode D through a resistor R, is cut-off. If the bistable circuit B is set to the high output state and the transistor 0, becomes conductive, a current is passed through a path: a source terminal +V,, the tunnel diode D,,, the resistor R,,,, the transistor Q and the ground. Accordingly, the tunnel diode D is biased to a low-voltage region in two possible stable states, and then transferred to a high voltage region over a negative-resistance region when a negative pulse of the input signal is applied thereto. A part of the output resets the bistable circuit B as mentioned above. This reset may be performed by another control pulse until a next pulse from the circuit A.

If the transistor Q is a NPN transistor, the example shown in FIG. 8A is modified as shown in FIG. 8B, in which the conductive direction of the collector-emitter path of the transistor 0,. is directed in a direction from the source terminal +V, to the ground.

If the anode of the tunnel diode D, is connected to the ground, the polarity of the bias voltage V, is negative as shown in FIGS. 8C and 8D.

The output terminal 13 may be provided at the anode of the tunnel diode 1),, as shown in FIGS. 85 and SF.

Merits of this invention against the conventional circuit shown in FIG. 1 can be summarized as follows:

1. The operations of the countdown circuit circuit of this invention are very stable. In other words, since no current is passed through the tunnel diode D if the transistor Q is cut-off, the tunnel diode D is maintained in a low-voltage region unless a current more than a current I, is supplied from the transistor 0, in this condition. While the tunnel diode D, is biased so as to assume one of two possible states as shown in FIG. 7 when the transistor Q is conductive, a load line for this condition is determined by the source voltage V, and the value of the resistor R,,,. Accordingly, fluctuations because of the room temperature variations etc are very small. Since the level i of the negative input pulse is sufficient to satisfy the following relationship:

f t 4 4B. stream: Am

1. A count-down circuit, comprising: a tunnel diode, input terminal means for applying an input pulse signal to one electrode of an anode and a cathode of the tunnel diode; means defining an electrical path from of input terminal means to said tunnel diode; output terminal means connected to said one electrode of the tunnel diode for deriving therefrom an output pulse signal whose repetition frequency corresponds to a counted-down frequency of the repetition frequency of said input pulse signal; a series-connection connected to said output terminal means and comprising a resistor and a collector-emitter path of a transistor; bias means for passing a necessary bias current through said collector-emitter path, said resistor and said tunnel diode so that an operating point of said tunnel diode is maintained in a low-voltage region; a pulse generator connected to said input terminal means in a branch connection from said electrical path between said input terminal to said tunnel diode for generating a pulse having a repetition period equal to an integer multiple of a repetition period of the input pulse signal in synchronism with each one of the leading edges and the trailing edges of the input pulse signal; and a bistable circuit connected between the output of said pulse generator and the base of said transistor, the bistable circuit being set in response to each output pulse of said pulse generator and reset until a just succeeding one of output pulses of said pulse generator.

2. A count-down circuit according to claim 1, in which said bistable circuit comprises a reset input and including means connecting said output terminal means to the reset input of said bistable circuit to reset the bistable circuit in response to each one of said output pulses.

3. A count-down circuit according to claim 1, in which said pulse generator is a monostable multivibrator. 

1. A count-down circuit, comprising: a tunnel diode; input terminal means for applying an input pulse signal to one electrode of an anode and a cathode of the tunnel diode; means defining an electrical path from of input terminal means to said tunnel diode; output terminal means connected to said one electrode of the tunnel diode for deriving therefrom an output pulse signal whose repetition frequency corresponds to a counteddown frequency of the repetition frequency of said input pulse signal; a series-connection connected to said output terminal means and comprising a resistor and a collector-emitter path of a transistor; bias means for passing a necessary bias current through said collector-emitter path, said resistor and said tunnel diode so that an operating point of said tunnel diode is maintained in a low-voltage region; a pulse generator connected to said input terminal means in a branch connection from said electrical path between said input terminal to said tunnel diode for generating a pulse having a repetition period equal to an integer multiple of a repetition period of the input pulse signal in synchronism with each one of the leading edges and the trailing edges of the input pulse signal; and a bistable circuit connected between the output of said pulse generator and the base of said transistor, the bistable circuit being set in response to each output pulse of said pulse generator and reset until a just succeeding one of output pulses of said pulse generator.
 2. A count-down circuit according to claim 1, in which said bistable circuit comprises a reset input and including means connecting said output terminal means to the reset input of said bistable circuit to reset the bistable circuit in response to each one of said output pulses.
 3. A count-down circuit according to claim 1, in which said pulse generator is a monostable multivibrator. 